Flip-flop, integrated circuit, and flip-flop reset

专利名称：Flip-flop, integrated circuit, and flip-flop

resetting method

发明人：Makoto Mori申请号：US11374183申请日：20060314

公开号：US20070146031A1公开日：20070628

专利附图：

摘要：A flip-flop which eliminates a reset wiring to prevent complication of a wiring inan LSI or to increase the number of channels used for a signal wiring, an integrated circuitusing the same, and a flip-flop resetting method, are provided. The flip-flop performing a

reset operation by detecting a change in a power supply voltage includes a state

retaining node that stores a HIGH level voltage or a LOW level voltage, and a reset signalgeneration circuit that detects a change in a power supply voltage exceeding a

predetermined value to generate a reset signal for resetting a data storing state of thestate retaining node.

申请人：Makoto Mori

地址：Kawasaki JP

国籍：JP

更多信息请下载全文后查看