FSB50325T Smart Power Module (SPM) February 2006
FSB50325T
Smart Power Module (SPM)Features
•250V 3.0A 3-phase FRFET inverter including high voltageintegrated circuit (HVIC)•3 divided negative dc-link terminals for inverter current sens-ing applications•HVIC for gate driving and undervoltage protection•3/5V CMOS/TTL compatible, active-high interface•Optimized for low electromagnetic interference•Isolation voltage rating of 1500Vrms for 1min.•Extended VB pin for PCB isolation
General Description
FSB50325T is a tiny smart power module (SPM) based onFRFET technology as a compact inverter solution for smallpower motor drive applications such as fan motors and watersuppliers. It is composed of 6 fast-recovery MOSFET (FRFET),and 3 half-bridge HVICs for FRFET gate driving. FSB50325Tprovides low electromagnetic interference (EMI) characteristicswith optimized switching speed. Moreover, since it employsFRFET as a power switch, it has much better ruggedness andlarger safe operation area (SOA) than that of an IGBT-basedpower module or one-chip solution. The package is optimizedfor the thermal performance and compactness for the use in thebuilt-in motor application and any other application where theassembly space is concerned. FSB50325T is the most solutionfor the compact inverter providing the energy efficiency,compactness, and low electromagnetic interference.
Absolute Maximum Ratings
Symbol
VPNID25ID80IDPPDVCCVBSVINTJTSTGRθJCVISO
Parameter
DC Link Input Voltage,
Drain-source Voltage of each FRFETEach FRFET Drain Current, ContinuousEach FRFET Drain Current, ContinuousEach FRFET Drain Current, PeakMaximum Power DissipationControl Supply VoltageHigh-side Bias VoltageInput Signal Voltage
Operating Junction TemperatureStorage Temperature
Junction to Case Thermal ResistanceIsolation Voltage
TC = 25°C TC = 80°C
ConditionsRating
2501.51.01020-0.3 ~ VCC+0.3-20 ~ 125-50 ~ 150
Units
VAAAWVVV°C °C°C/WVrms
TC = 25°C, PW < 100µs 3.0TC = 25°C, Each FRFETApplied between VCC and COMApplied between IN and COM
Applied between VB(U)-U, VB(V)-V, VB(W)-W 20Each FRFET under inverter operating con-dition (Note 1)
60Hz, Sinusoidal, 1 minute, Connection pins to heatsink
10.21500
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FSB50325T Rev. A
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FSB50325T Smart Power Module (SPM) Pin DescriptionsPin Number1234567891011121314151617181920212223Pin NameCOMVB(U)VCC(U)IN(UH)IN(UL)NCVB(V)VCC(V)IN(VH)IN(VL)NCVB(W)VCC(W)IN(WH)IN(WL)NCPU, VS(U)NUNVV, VS(V)NWW, VS(W)IC Common Supply Ground Pin DescriptionBias Voltage for U Phase High Side FRFET Driving Bias Voltage for U Phase IC and Low Side FRFET Driving Signal Input for U Phase High-side Signal Input for U Phase Low-side No ConnectionBias Voltage for V Phase High Side FRFET Driving Bias Voltage for V Phase IC and Low Side FRFET Driving Signal Input for V Phase High-side Signal Input for V Phase Low-side No ConnectionBias Voltage for W Phase High Side FRFET Driving Bias Voltage for W Phase IC and Low Side FRFET Driving Signal Input for W Phase High-side Signal Input for W Phase Low-side No ConnectionPositive DC–Link Input Output for U Phase & Bias Voltage Ground for High Side FRFET Driving Negative DC–Link Input for U PhaseNegative DC–Link Input for V PhaseOutput for V Phase & Bias Voltage Ground for High Side FRFET DrivingNegative DC–Link Input for W PhaseOutput for W Phase & Bias Voltage Ground for High Side FRFET Driving (1) COM(2) VB(U)(3) VCC(U)(4) IN(UH)(5) IN(UL)(6) NC(7) VB(V)(8) VCC(V)(9) IN(VH)(10) IN(VL)(11) NC(12) VB(W)(13) VCC(W)(14) IN(WH)(15) IN(WL)(16) NCNote: Source terminal of each low-side MOSFET is not connected to supply ground or bias voltage ground inside SPM. External connections should be made as indicated in Figure2 and 5. (17) PVCCHINLINCOMVBHOVSLO(19) NUVCCHINLINCOMVBHOVSLO(21) V, VS(V)(20) NV(18) U, VS(U)VCCHINLINCOMVBHOVSLO(22) NW(23) W, VS(W) Figure 1. Pin Configuration and Internal Block Diagram (Bottom View)FSB50325T Rev. A
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FSB50325T Smart Power Module (SPM) Electrical Characteristics (TJ = 25°C, VCC=VBS=15V Unless Otherwise Specified)
Inverter Part (Each FRFET Unless Otherwise Specified) Symbol
BVDSS∆BVDSS/∆TJIDSSRDS(on)VSDtONtOFFtrrEONEOFFRBSOA
(Note 3)
V = 200V, VCC = VBS = 15V, ID = IDP, VDS=BVDSS,
Reverse-bias Safe Oper-PN
TJ = 125°C
ating Area
High- and low-side FRFET switching (Note 4)Switching Times
ParameterConditionsMinTypMaxUnits
250----------0.31-1.4-1076660108473.1
--2501.81.2-----VVµAΩVnsnsnsµJµJ
Drain-Source Breakdown
VIN= 0V, ID = 250µA (Note 2)
Voltage
Breakdown Voltage Tem-ID = 250µA, Referenced to 25°C
perature CoefficientZero Gate VoltageDrain CurrentStatic Drain-SourceOn-ResistanceDrain-Source DiodeForward Voltage
VIN= 0V, VDS = 250V
VCC = VBS = 15V, VIN = 5V, ID = 1.0AVCC = VBS = 15V, VIN = 0V, ID = -1.0AVPN = 150V, VCC = VBS = 15V, ID = 1.0AVIN = 0V ↔ 5V
Inductive load L=3mH
High- and low-side FRFET switching
Full Square
Control Part (Each HVIC Unless Otherwise Specified) Symbol
IQCCIQBSUVCCDUVCCRUVBSDUVBSRVIHVILIIHIIL
Note:
1.For the measurement point of case temperature TC, please refer to Figure 3 in page 4.
2.BVDSS is the absolute maximum voltage rating between drain and source terminal of each FRFET inside SPM. VPN should be sufficiently less than this value considering the
effect of the stray inductance so that VDS should not exceed BVDSS in any case.3. tON and tOFF include the propagation delay time of the internal drive IC. Listed values are measured at the laboratory test condition, and they can be different according to thefield applcations due to the effect of different printed circuit boards and wirings. Please see Figure 4 for the switching time definition with the switching test circuit of Figure 5.4.The peak current and voltage of each FRFET during the switching operation should be included in the safe operating area (SOA). Please see Figure 5 for the RBSOA test cir-cuit that is same as the switching test circuit.
Parameter
Quiescent VCC CurrentQuiescent VBS CurrentLow-side UndervoltageProtection (Figure 6)High-side UndervoltageProtection (Figure 7)ON Threshold VoltageOFF Threshold VoltageInput Bias Current
VCC=15V, VIN=0VVBS=15V, VIN=0V
Conditions
Applied between VCC and COMApplied between VB(U)-U, VB(V)-V, VB(W)-W
MinTypMaxUnits
--7.48.07.48.02.9-----8.08.98.08.9--10-1601009.49.89.49.8-0.8202
µAµAVVVVVVµAµA
VCC Undervoltage Protection Detection LevelVCC Undervoltage Protection Reset LevelVBS Undervoltage Protection Detection LevelVBS Undervoltage Protection Reset LevelLogic High LevelLogic Low LevelVIN = 5VVIN = 0V
Applied between IN and COMApplied between IN and COM
FSB50325T Rev. A
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FSB50325T Smart Power Module (SPM) Recommended Operating ConditionsSymbolVPNVCCVBSVIN(ON)VIN(OFF)tdeadfPWMTCParameterSupply VoltageControl Supply VoltageHigh-side Bias VoltageInput ON Threshold VoltageInput OFF Threshold VoltageConditionsApplied between P and NApplied between VCC and COMApplied between VB and output(U, V, W)Applied between IN and COMValue Min.-13.513.53.001.0--20Typ.1501515---15-Max.20016.516.5VCC0.6--100UnitsVVVVVµskHz°CBlanking Time for PreventingVCC=VBS=13.5 ~ 16.5V, TJ ≤ 125°CArm-shortPWM Switching FrequencyCase TemperatureTJ ≤ 125°CTJ ≤ 125°CThese values depend on PWMcontrol algorithm15-V LineR1D1VCCHINLINC5COMVBHOVSLON10µFC2One-Leg Diagram of SPM* Example of bootstrap paramters: C1 = C2 = 1µF ceramic capacitor, R1 = 56Ω,R3C1PVDCInverterOutputC3HIN0LIN0101OpenOutputZ0VDCForbiddenZNoteBoth FRFET OffLow-side FRFET OnHigh-side FRFET OnShoot-throughSame as (0, 0)R5011OpenMicomNote:(1)It is recommended the bootstrap diode D1 to have soft and fast recovery characteristics with 400-V rating(2)Parameters for bootsrap circuit elements are dependent on PWM algorithm. For 15 kHz of switching frequency, typical example of parameters is shown above. (3)RC coupling(R5 and C5) at each input (indicated as dotted lines) may be used to prevent improper input signal due to surge noise. Signal input of SPM is compatible with stan-dard CMOS or LSTTL outptus. (4)Bold lines should be short and thick in PCB pattern to have small stray inductance of circuit, which results in the reduction of surge voltage. Bypass capacitors such as C1, C2and C3 should have good high-frequency characteristics to absorb high-frequency ripple current. Figure 2. Recommended CPU Interface and Bootstrap Circuit with Parameters14.50mm3.80mmMOSFETNote:Case Temperature(Tc) Detecting PointAttach the thermocouple on top of the heatsink-side of SPM (between SPM and heatsink if applied) to get the correct temperature measurement.Figure 3. Case Temperature Measurement FSB50325T Rev. A
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FSB50325T Smart Power Module (SPM) VINIrrVDS100% of ID120% of IDVINID10% of IDIDVDStONtrrtOFF(a) Turn-on(b) Turn-offFigure 4. Switching Time DefinitionCBSVCCRBSVCCHINLINCOMVBHOVSLO+VDS-LVDCIDOne-leg Diagram of SPMFigure 5. Switching and RBSOA(Single-pulse) Test Circuit (Low-side)Input SignalUV ProtectionStatusRESETDETECTIONRESETLow-side Supply, VCCUVCCRUVCCDMOSFET CurrentFigure 6. Undervoltage Protection (Low-side)Input SignalUV ProtectionStatusRESETDETECTIONRESETHigh-side Supply, VBSUVBSRUVBSDMOSFET CurrentFigure 7. Undervoltage Protection (High-side)FSB50325T Rev. A
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FSB50325T Smart Power Module (SPM) C1(1) COMR1R5(2) VB(U)(3) VCC(U)(4) IN(UH)(5) IN(UL)C5R1C2(6) NC(7) VB(V)(8) VCC(V)(9) IN(VH)VCCHINLINCOMVBHOVSLOVCCHINLINCOMVBHOVSLO(19) NU(20) NV(21) V, VS(V)(18) U, VS(U)C3VDC(17) PMicom(10) IN(VL)C2R1(11) NC(12) VB(W)(13) VCC(W)(14) IN(WH)(15) IN(WL)C2(16) NCMVCCHINLINCOMVBHOVSLO(22) NW(23) W, VS(W)For 3-phase current sensing and protection15-VSupplyR4C4R3Figure 8. Example of Application CircuitFSB50325T Rev. A
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FSB50325T Smart Power Module (SPM) Detailed Package Outline DrawingsMax 1.000.60±0.10(1.165)15*1.778=26.67±0.3013.34±0.3013.34±0.30(1.80)(1.00)#1#16R0.40R400.19.0012.00±0.2012.23±0.3029.00±0.202x3.90=7.80±0.30(2.275)13.13±0.303.10±0.206.20±0.204x3.90=15.60±0.301.95±0.30(1.80)(1.30)0.60±0.10Max 1.00FSB50325T Rev. A
7
0.50+0.10-0.05#17#235°3°14.58±0.3014.00www.fairchildsemi.com
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PRODUCT STATUS DEFINITIONSDefinition of TermsDatasheet IdentificationAdvance Information
Product StatusFormative orIn Design
Definition
This datasheet contains the design specifications forproduct development. Specifications may change inany manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.Fairchild Semiconductor reserves the right to makechanges at any time without notice in order to improvedesign.
This datasheet contains final specifications. FairchildSemiconductor reserves the right to make changes atany time without notice in order to improve design.
PreliminaryFirst Production
No Identification NeededFull Production
ObsoleteNot In Production
This datasheet contains specifications on a productthat has been discontinued by Fairchild semiconductor.The datasheet is printed for reference information only.
Rev. I18
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